Design, simulate, and program electronics.

Fedora's Electronic Lab is dedicated to support the innovation and development brought by opensource Electronic Design Automation (EDA) community.

Community Space

Latest Articles

Fedora Electronic Lab is

  • Fedora's EDA portfolio.
  • a free and opensource EDA provider and community builder.
  • building a bridge between both free and opensource hardware and software communities.
  • the fruit of the outstanding work done by its respective upstream developers.


  • Deployable in both development and production environments.
  • No kernel patches are required, making it easy to deploy and use.
  • Free and opensource licensed and NO purchase of extra licenses is required to activate its features.


  • ASIC : Application-Specific Integrated Circuit
  • EDA : Electronic Design Automation
  • VLSI : Very Large Scale Integration, about 10⁶ to 10⁷ transistors

About FEL

About Fedora Electronic Lab


Fedora's Electronic Laboratory, an opensource hardware design and simulation platform, is dedicated to support the innovation and development brought by opensource Electronic Design Automation (EDA) community.

Fedora Electronic Laboratory provides a complete electronic laboratory setup with reliable open source design tools in order to help you keep in pace with current technological race. It reduces the risk assessment of open source hardware development and enable electronic designers tapeout quickly and efficiently.

Fedora Electronic Lab targets mainly the Micro-Nano Electronic Engineering field. It introduces:

  • A collection of Perl modules to extend Verilog and VHDL support.
  • Tools for Application-Specific Integrated Circuit (ASIC) Design Flow process.
  • Extra standard cell libraries supporting a feature size of 0.13µm. (more than 300 MB)
  • Extracted spice decks which can be simulated with gnucap/ngspice or any spice simulators.
  • Interoperability between various packages in order to achieve different design flows.
  • Tools for embedded design and to provide support for ARM as a secondary architecture in Fedora.
  • Tool set for Openmoko development and other open source hardware communities.
  • A peer review eeb-based solution coupled with an Eclipse IDE for Embedded/Digital Hardware IP design.
  • PLA tools, C-based design methodologies, simulators for 8051 and 8085 microcontrollers and many more.

FEL's Commitment

Fedora Electronic Lab (FEL) comes to fix one big problem in the opensource community. This problem is usually unknown to many people or taken for granted.

The problem is: there is no one who provides opensource EDA solutions for the real life. Although it is one problem, it is very complex in itself. In real life, designers use EDA software to design chips or circuit boards. Thereby the designer requires a set of hardware design tools to design his/her chips. However the same set of hardware design tools does not apply for every hardware design project.

Since a hardware design project consists of different types of circuits: Analog, Digital and Mixed Signal, each of these types entails its own design flow and methodologies. Each type requires several different EDA software to successfully design, simulate and verify the designed circuit. Since these types of circuits are incorporated on same die, these circuits should be able to interface each other. Thereby as an EDA provider we should provide our users with EDA solutions that fulfill design flows rather than random EDA software.

After 3 years of hard work, one can define FEL as:
Fedora Electronic Lab is Fedora's high-end hardware design and simulation platform. This platform provides different hardware design flows based on the semiconductor industry's current trend. FEL maps in three methodologies {design, simulation and verification} with opensource EDA software to give a better hardware design experience.

FEL also bridges 2 different opensource communities:
  • opensource software community
  • opensource hardware community
As an EDA provider, we have to know what are the targeting users. Above is a picture which describes a typical semiconductor design centre. This design centre is composed of several design teams and each design team needs to interact with other design teams. What is also important here is sharing of data between design teams should be possible. We have worked with several upstream projects to make it possible and other upstream projects have opted industry standard format to make interoperability possible. It is also crucial that the data format from commercial software could be read by opensource EDA software. However this is beyond our reach.

When the design centre receives a project and project specifications have already been established by the marketing team, the project coordinator will have to divide the project in accordance to his/her respective design teams. The EDA/CAD department assists the design teams with the proper EDA software with respect to the project. Each design team will work with several design tools (at least 5) together with some in-house scripts. These EDA software ensure design, simulation and verification methodologies. After the project have been taped-out and manufactured. The Testing and Validation Unit verifies the chips or circuit boards one by one.

From the Project Specifications till the final validation, FEL strives to satisfy all the needs of the design centre. FEL also provides the design centre with 7 standard cells libraries. Since the semiconductor industry is a highly competitive environment, it is a never-ending process to provide several methodologies to improve hardware design experience.


Targetted Users

Design Tools for the Semiconductor Design Center.

About Fedora Electronic Lab

About the developers

How we shaped FEL

Learn how FEL was designed from scratch and what it means for our upstream developers.

Fedora Electronic Lab is a subproject of the Fedora Project dedicated to EDA tools and open hardware content. Every 6 months a new version is released for free download. The goal is not only package those tools for you, but shape those tools to satisfy design methodologies. For more information, visit our developers' blogs Fedora Project is an open community for software development, sponsored by Red Hat Inc. The Fedora Project supports our web hosting facilities and granted Chitlesh the legal right to use the trademark "fedora" on Fedora Electronic Lab. The Fedora Project is a non-profit organisation which strives to give the cutting-edge software technologies for free.


Three years ago, Chitlesh Goorah proposed "Fedora Electronic Lab" to the Fedora community by providing existing opensource EDA tools for ASIC design. The main objective was to ensure that all the opensource EDA tools can exchange data between them (ensuring at least a basic design flow). Since each of the design tool were being developed individually each has its own storage mechanism (make it difficult for interoperability). Thereby Fedora worked with various upstream developers to shape their EDA tools so that universities or small companies can opt for these tools.

Compiling each of these tools individually and building his/her own design flow at home is very difficult. Thereby with Fedora Electronic Lab, users will only use the tools instead of compiling it from scratch. Fedora Electronic Lab follows the industry trends with what is available on the opensource ecosystem. Hence FEL users will benefit from such deployment infrastructure for free and quickly.

Thibault North was introduced to Fedora Electronic Lab by Joerg Simon a german Fedora ambassador. Thibault is the Fedora Electronic Lab Release engineer focussing on the quality of the LiveDVD being spinned.

During F-10 development cycle, Aanjhan Ranganathan joined the team and revived Fedora Electronic Lab's marketing in India. He performed bug triage within the community, till F-11's release.

Shakthi Kannan stepped in to enhance the existing FEL platform during F-12 development cycle. He added PLA tool support and simulators for 8051 microcontrollers. He is responsible for FEL's community development, implementation of new digital solutions and he plays a vital role FEL's marketing in India.


17|11|2013FEL 21 released
17|11|2013FEL 20 Heisenbug released
02|07|2013FEL 19 Schrödinger's Cat released
15|01|2013FEL 18 Spherical Cow released
29|05|2012FEL 17 Beefy Miracle released
08|11|2011FEL 16 Verne released
24|05|2011FEL 15 Lovelock released
02|11|2010FEL 14 Laughlin released
25|05|2010FEL 13 Goddard released
17|11|2009FEL 12 Constantine released
09|06|2009FEL 11 Leonidas released
25|11|2008FEL 10 Cambridge released
28|08|2008FAB approved "Fedora Electronic Lab" LiveDVD spin
30|05|2008FEL 9 Sulphur released at Linuxtag2008
08|11|2007FEL 8 Werewolf released
16|08|2007FESCo approved "Fedora Electronic Lab" as a feature

Fedora Electronic Lab


This platform provides outstanding solutions for micro-nanoelectronic design from project specifications, design, functional simulation, backend design and prototyping evaluations boards.


Fedora Electronic Lab

Featured Solutions

The Fedora Electronic Lab includes design tools for:
  • ASIC Analog Circuit Design and Simulation
  • ASIC Layout, DRC and LVS
  • Digital Simulation and Verification
  • RTL and logic synthesis design flows
  • Circuit and PCB Layout
  • Micro Controller (µC) Programming and Embedded Systems Development
  • CAD Tools
  • Project Management, Peer Review and budget tracking

ASIC Analog Circuit Design and Simulation

This simulation lab enables design engineers to edit and simulate their schematics.
  • General Purpose Circuit Simulators (Analysis : Nonlinear AC/DC, Transient, Fourier, S-parameter and harmonic balance).
  • Beyond Spice capabilities: Level 49, BSIMv3 and EKV implementations.
  • Multi-lingual, ability to mimic different variants of spice, and also supporting the newer languages like Verilog-AMS.
  • Draws publishable-quality electrical circuit schematic diagrams.
  • Circuit components can be retrieved from libraries which are fully editable.


  • gnucap - A general purpose circuit simulator with its engine designed to do true mixed-mode simulation. The developer's thesis can be read here.
  • ngspice - A mixed level/signal circuit simulator
  • gspiceui - A frontend to Spice circuit simulators
  • xcircuit - A general-purpose drawing program and also a specific-purpose CAD program for circuit schematic drawing and schematic capture.

ASIC Layout, DRC and LVS

  • A continuous DRC that operates in background and gives an up-to-date picture of violations.
  • A hierarchical circuit extractor that only re-extracts portions of the circuit that have changed.
  • Plowing that permits interactive stretching and compaction.
  • Routing tools that work under and around existing connections.
  • Logs and corner stitching to achieve efficient implementations.
  • Dedicated to training in sub-micron CMOS VLSI design with full editing facilities.
  • Supports technology files by the MOSIS foundry service.
  • Switch-level simulation of the layout, by considering transistors as ideal switches, or using RC time constants to predict the relative timing of events through extracted capacitance and lumped resistance values.
  • Ensures that layout connectivity matches the logical design represented by the schematic or netlist before tapeout by automatically extracting devices and nets formed across layout hierarchy and comparing them to the schematic netlist. (LVS) )
  • Generates GDS II stream format and CIF from a given layout.
  • Achievement : Thick-film circuit layout using the Magic layout editor.


Magic - Widely cited as being the easiest tool to use for circuit layout, even for people who ultimately rely on commercial tools for their product design flow.

Electric - A sophisticated electrical CAD system that can handle many forms of circuit design, including custom IC layout (ASICs), schematic drawing, hardware description language specifications, and electro-mechanical hybrid layout. View the IEEE Santa Clara Valley (June 4, 2009) presentation here.

Toped - A cross-platform VLSI IC layout editor.

Netgen - A tool for comparing netlists, in analog or mixed-signal circuits that cannot be simulated in reasonable time.

Digital Simulation and Verification

A HDL simulation environment that enables you to verify the functional and timing models of your design. Thus, your Design teams can focus on improving existing methodologies with tools that scale across multiple levels of abstraction and design complexity.
  • VPI functionality.
  • A graphical waveform viewer.
  • Supports both VHDL and Verilog designs.
  • A Verilog simulator and synthesis tool for IEEE 1364-2001 standard.
  • Export signals to a VCD file or a GHW file for visual inspection with a waveform viewer.
  • Pretty printing or cross references generation in HTML.
  • Makefile generation for any component in a design.
  • Achievements: Successfully compiled and run a DLX processor and a LEON1 SPARC processor.
  • Automatic layout generation from VHDL description via desired standard cell libraries.
  • Implementation of the VHDL language in accordance to the IEEE 1076-1987 standard, IEEE 1076-1993 standard, the protected types of VHDL00 (aka IEEE 1076a or IEEE 1076-2000) and non-standard third party libraries.


GHDL A VHDL simulator, using the GCC technology. GHDL implements the VHDL language according to the IEEE 1076-1987 or the IEEE 1076-1993 standard. It compiles VHDL files and creates a binary that simulates your design.

Qucs - A circuit simulator with graphical user interface. The software aims to support all kinds of circuit simulation types, e.g. DC, AC, S-parameter and harmonic balance analysis.

FreeHDL - Yet another VHDL simulator.

Icarus Verilog A Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard. More than a simulator.

GTKWave Waveform viewer that can view VCD files produced by most VHDL/Verilog simulation tools, as well as LXT files produced by certain Verilog simulation tools.

Drawtiming - A command line tool for generating timing diagrams from ASCII input files. The input files use a structured language to represent signal state transitions and interdependencies.

RTL and logic synthesis design flows

  • Automatic schematic generation
  • VHDL compilation and simulation
  • Finite State Machines (FSM)
  • Model checking and formal proof
  • RTL and Logic synthesis
  • Data-Path compilation
  • Macro-cells generation
  • Symbolic Pad cells
  • Design rules checking
  • Place and route
  • Layout edition
  • Netlist extraction and verification
  • Automatic Layout generation
  • Physical optimization and layout design flows
  • Complete RTL to CIF and GDSII flows
  • 7 extra standard cells up to a feature size of 0.13µm
  • Read/write standard ins/outs including Verilog and VHDL
  • Creates a POV-Ray (3D view) scene description file of the GDSII data.


pharosc VLSI and ASIC Technology Standard Cell Libraries

Alliance - a complete set of CAD tools and portable libraries for VLSI design. It includes a VHDL compiler and simulator, logic synthesis tools, and automatic place and route tools.

gds2pov - Creates attractive 3D pictures of a layout. Converts GDS2 layout file to POV-Ray

Circuit and PCB Layout

A professional-quality printed circuit board design environment along with:
  • schematic capture, simulation, prototyping attribute management,
  • bill of materials (BOM) generation and netlisting into over 20 netlist formats.
  • Includes a rats nest feature, design rule checking, and can provide industry standard RS-274-X (Gerber), NC drill, and centroid data (X-Y data) output for use in the board fabrication and assembly process.
  • Offers high end features such as an autorouter and trace optimizer, which can tremendously reduce layout time.
  • Creates PCB of up to 8 layers with an unlimited number of components and nets.
  • Includes a viewer for Gerber files (RS274X), which supports NC-drill and Excellon formats.


PCB - An interactive printed circuit board editor.

Gerbv - Gerber Viewer (gerbv) is a viewer for Gerber files. Gerber files are generated from PCB CAD system and sent to PCB manufacturers as basis for the manufacturing process.

gEDA - A full suite of Electronic Design Automation tools.

Kicad - Kicad creates electronic schematic diagrams and printed circuit board artwork up to 16 layers.

Embedded Systems Development

µController Programming

Supported compilers:
  • the Small Device C Compiler, the GNU PIC Utilities, the PICC compilers,
  • the PIC30 toolchain, the C18 compiler, the JAL and JALV2 compilers,
  • the CSC compiler, and the Boost compilers.
Ease to use IDEs for microcontrollers circuit design, simulation and programmation to serial, parallel and USB ports.

IDE includes an oscilloscope and a flowchart integration.

Supported debuggers : ICD2 and GPSim.
Supported programmers : ICD2, PICkit1 and PICkit2 and PicStart+ programmers.
Supports 8051 and AVR.

AVR Development System

Supports the Atmel's STK500 and the PPI (parallel port interface) programmer types.

  • Cross compilers and Programmers
  • A Universal In-System Programmer for Atmel AVR and 8051
  • A Program for interfacing the Atmel JTAG ICE to GDB
Small Device C Compiler Special contributions from Fedora Embedded SIG.

CAD Tools

The CAD department of many semiconductor design centers maintain various scripts under various version control systems. We strives to give those CAD engineers some perl modules and a proper platform.
  • Revision Control : CVS, SVN, GIT, RCS
  • Web based tools : Trac, Bugzilla
  • UML to maintain their personalized perl scripts.
Perl Modules:
  • VHDL : perl-Hardware-Vhdl-Parser, perl-Hardware-Vhdl-Tidy, perl-Hardware-Vhdl-Lexer
  • Verilog : perl-Verilog perl-Verilog-CodeGen perl-Hardware-Verilog-Parser perl-Verilog-Readmem
  • Systemc : perl-SystemPerl perl-SystemC-Vregs (Read more about SystemC on Fedora here
  • Generation of documentation : doxygen with VHDL support
  • SystemVerilog : perl-Verilog
  • Modelsim List: perl-ModelSim-List

Project Management and budget tracking

  • Gantt Diagram : planner
  • Mind mapping tools (excellent for FPGA design) : Vym
  • Budget Tracking : Kmymoney, Openoffice Spreadsheet
  • System design : Dia, Inkscape



A screenshot of a circuit simulation with ngspice.


Mixed Signal Design

ASIC Design Flow.


GDSII Export


ASIC Analog Design

Analog schematic design with schematic.


Digital Design

Digital Simulation with GTKWave and ghdl.


ASIC Digital Design

A screenshot of a place and route.


ASIC Digital Design

A screenshot of a schematic generated from VHDL code.


PCB Design

A screenshot of a PCB layout done with Kicad.


PCB Design

A screenshot of a PCB layout done with PCB.


Project Planning

A screenshot of HDL IP development with Perl and UML.


Project Planning

A screenshot of a Project Planning with planner.


Fedora Electronic Lab

Publications and Presentations

Fedora Project has quality class ambassadors around the world. These ambassadors will gladly answer your questions and will conduct various presentations in your locality. You can request a Fedora Electronic Lab presentation to be conducted in your locality via our ticketing service.

Want to do a presentation?

Use our OpenOffice template and sources for your publications or presentations.

Share your publications

Use our ticketing service service to publish your publications or presentations here


Fedora Electronic Lab 12 Flyer

By Chitlesh Goorah.
This highlights the key features of this advanced electronics design and simulation platform, assembled by Fedora for FEL 12.

Fedora Electronic Lab in Research and Development environment

This paper entails how the Fedora Project encourages Research and Development in advanced electronics design through its Fedora Electronic Laboratory (FEL) platform. Fedora has opted a different approach in the development of such high-end hardware design and simulation platform. This approach focuses mainly on providing opensource EDA solutions to meet several high-end design flows and methodologies, rather than the traditional opensource method: random packaging process.
Download - 25 March 2009 EDA-FEL-011/PP#01.00


Journées Méditerranéenes du Logiciel Libre 2009, Sophia-Antipolis, France

By Laurent Charpentier.
In one of the largest technological parks in the world, Laurent, with more than 15 years of experience in digital IC design, gave a presentation about HDL design, simulation and PCB design with free and opensource EDA software. His audience, mostly Electronic Engineers from local semiconductor companies (Infineon, Texas-Instruments, ST-Ericsson, ...), were very pleased to know about the FEL initiative and happy to learn that it is now easier to find opensource tools that are ready to use. At the booth, Laurent gave some outstanding demos of Kicad (PCB), KtechLab (simulation) and other tools.
Download - 27-28 November 2009 -- Event Report

LinuxTag 2009 - Berlin, Germany

By Chitlesh Goorah.
Fedora's grounding principles explained and maturity has helped in creating Fedora Electronic Lab and why there has not been such initiative before. Fedora Electronic Lab focuses on giving hardware design methodologies with opensource EDA tools and helps to foster a community around the opensource EDA community.
Download - 26 June 2009 -- Blog Report

Dr. B.C Roy Engineering College, India

By Rangeen Basu, Subhodip Biswas, Arindam Ghosh, Ratnadeep Debnath and Kishan Goyal. FEL was deployed under 30 computers to demonstrate gsim85, Ktechlab, octave, piklab, gresistor, drawtiming, ghdl, ... FEL LiveDVDs were distributed freely.
14 May 2009 -- Blog Report 1 -- Blog Report 2 -- Blog Report 3 -- Blog Report 4 -- Blog Report 5

FOSSCOMM 2009 - Larissa, Greece

By Kostas Antonakoglou.
Fedora Electronic Lab was introduced and a work flow demonstration was conducted to show how electronic design can be achieved efficiently.
8 May 2009 -- Blog Report

FOSDEM 2009 - Brussels, Belgium

By Chitlesh Goorah.
Fedora's grounding principles explained and maturity has helped in creating Fedora Electronic Lab and why there has not been such initiative before. Fedora Electronic Lab focuses on giving hardware design methodologies with opensource EDA tools and helps to foster a community around the opensource EDA community.
Download - 7 February 2009 -- Blog Report 2008 - Bangalore, India

By Aanjhan Ranganathan.
Introduction to Fedora Electronic lab and opensource EDA tools.The success of FEL in India explained and how Free software is gaining ground everywhere in the world.
Download - 28 November 2008 -- Blog Report

LinuxTag 2008 - Berlin, Germany

By Thibault North.
Introduction to Fedora Electronic lab and opensource EDA tools. Board level design explained with respect to the work done behind gEDA/gaf community.
Download - 30 May 2008.



JML2 2009

Laurent Charpentier held a presentation in one of Europe's largest technology parks, Sophia-Antipolis in France. The latter is the home to hundreds of high tech companies.


FOSSCOMM 2009 - Larissa, Greece

Kostas Antonakoglou explains how various design flows can be achieved.


Linuxtag Berlin 2009

Chitlesh Goorah held a presentation at FUDCon during Linuxtag 2009. This presentation was to expose FEL's roadmap to the other Fedora developers.



Chitlesh Goorah details why FEL's is some unique and where it is heading.


Linuxtag Berlin 2008

Thibault North gave the FEL's first public presentation at Linuxtag 2008 in Berlin.

Event 2008

Aanjhan Ranganathan and other Fedora contributors exposed how users can benefit with an opensource EDA platform.


Fedora Electronic Lab can be deployed with these simple mechanisms, via either
  • yum,
  • a Fedora Electronic Lab LiveDVD.

Yum install

As from Fedora-11 Leonidas, Fedora users can groupinstall all FEL EDA software at once with:

# yum groupinstall 'Electronic Lab'


The LiveDVD can be downloaded either via http or torrent. A LiveDVD is an operating system that is executed upon boot, without installation on a hard drive. A desktop icon can be used to install the OS if wanted.

Torrent Download

32-bit PC Edition

32-bit PC EditionThis edition is for the highest compatibility; it will work on both 32-bit and 64-bit computers.

Download Now!

54K Torrent File for 32-bit PC ISO
How do I use this file?

64-bit PC Edition

64-bit PC EditionEnjoy the full power and speed of a 64-bit computer. Not compatible with 32-bit computers.

Download Now!

54K Torrent File for 64-bit PC ISO
How do I use this file?

Direct Download

32-bit PC Edition

32-bit PC EditionThis edition is for the highest compatibility; it will work on both 32-bit and 64-bit computers.

Download Now!

2.5GB for 32-bit PC ISO
How do I use this file?

64-bit PC Edition

64-bit PC EditionEnjoy the full power and speed of a 64-bit computer. Not compatible with 32-bit computers.

Download Now!

2.5GB for 64-bit PC ISO
How do I use this file?


Unsure if your computer is 32-bit or 64-bit?

Older releases of this spin can be found at


Help via Chat

General help is available in irc channel #fedora on

For help using IRC, please visit the Fedora IRC how-to.

Help via Email

Users and developers are also available on the mailing list at

General help with Fedora is available on the Fedora users' mailing list at

For guidance on how to interact on Fedora mailing lists, please review the Fedora Mailing List Guidelines.

General Help Using Fedora

Sometimes you may encounter an issue with this spin that you can get help with using general Fedora support resources. A list of those resources is available at the Fedora 'Get Help' page.


Fedora Electronic Lab team does not provide commercial technical support. The only types of technical support, FEL provides are through the

  • Ticketing service to request any enhancement or developer sponsoring.
  • Bugzilla to file any bug encountered in the EDA tools.

Fedora Electronic Lab


This platform provides outstanding solutions for micro-nanoelectronic design from project specifications, design, functional simulation, backend design and prototyping evaluations boards.

ASIC Design flows


This is a MIPS-R3000 of 52000 transistors, that has been completely designed using Alliance CAD tools.

Fedora Electronic Lab


The FEL team strives to provide a suitable EDA platform and design flows for the real life.

Toped Layout Editor

User's design

This screenshot demonstrates the layout done on Fedora 8 by Svilen Krustev.

By clicking on and downloading Fedora, you agree to comply with the following terms and conditions:

By downloading Fedora software, you acknowledge that you understand all of the following: Fedora software and technical information may be subject to the U.S. Export Administration Regulations (the “EAR”) and other U.S. and foreign laws and may not be exported, re-exported or transferred (a) to any country listed in Country Group E:1 in Supplement No. 1 to part 740 of the EAR (currently, Cuba, Iran, North Korea, Sudan & Syria); (b) to any prohibited destination or to any end user who has been prohibited from participating in U.S. export transactions by any federal agency of the U.S. government; or (c) for use in connection with the design, development or production of nuclear, chemical or biological weapons, or rocket systems, space launch vehicles, or sounding rockets, or unmanned air vehicle systems. You may not download Fedora software or technical information if you are located in one of these countries or otherwise subject to these restrictions. You may not provide Fedora software or technical information to individuals or entities located in one of these countries or otherwise subject to these restrictions. You are also responsible for compliance with foreign law requirements applicable to the import, export and use of Fedora software and technical information.